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FEATURES

LTM4603/LTM4603-1 6A DC/DC Module with PLL, Output Tracking and Margining DESCRIPTIO
The LTM(R)4603 is a complete 6A step-down switch mode DC/DC power supply with onboard switching controller, MOSFETs, inductor and all support components. The ModuleTM is housed in a small surface mount 15mm x 15mm x 2.8mm LGA package. Operating over an input voltage range of 4.5 to 20V, the LTM4603 supports an output voltage range of 0.6V to 5V as well as output voltage tracking and margining. The high efficiency design delivers 6A continuous current (8A peak). Only bulk input and output capacitors are needed to complete the design. The low profile (2.8mm) and light weight (1.73g) package easily mounts on the unused space on the back side of PC boards for high density point of load regulation. The Module can be synchronized with an external clock for reducing undesirable frequency harmonics and allows PolyPhase(R) operation for high load currents. A high switching frequency and adaptive on-time current mode architecture deliver a very fast transient response to line and load changes without sacrificing stability. An onboard remote sense amplifier can be used to accurately regulate an output voltage independent of load current. The onboard remote sense amplifier is not available in the LTM4603-1. The LTM4603/LTM4603-1 are pin compatible with the 12A LTM4601/LTM4601-1.
, LT, LTC, LTM and PolyPhase are registered trademarks of Linear Technology Corporation. Module is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Complete Switch Mode Power Supply Wide Input Voltage Range: 4.5V to 20V 6A DC Typical, 8A Peak Output Current 0.6V to 5V Output Voltage Output Voltage Tracking and Margining Remote Sensing for Precision Regulation (LTM4603 Only) Typical Operating Frequency: 1MHz PLL Frequency Synchronization 1.5% Regulation Current Foldback Protection (Disabled at Start-Up) Pin Compatible with the LTM4601 Pb-Free (e4) RoHS Compliant Package with Gold Finish Pads Ultrafast Transient Response Current Mode Control Up to 93% Efficiency at 5VIN, 3.3VOUT Programmable Soft-Start Output Overvoltage Protection Small Footprint, Low Profile (15mm x 15mm x 2.8mm) Surface Mount LGA Package
APPLICATIO S

Telecom and Networking Equipment Servers Industrial Equipment Point of Load Regulation
TYPICAL APPLICATIO
VIN 4.5V TO 20V VIN PGOOD RUN COMP INTVCC DRVCC MPGM SGND
Efficiency vs Load Current with 12VIN
1.00 0.95 CLOCK SYNC TRACK/SS CONTROL EFFICIENCY (%) 0.90 0.85 VOUT 1.5V 6A 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0
4603 TA01a 4603 TA01b
1.5V/6A Power Supply with 4.5V to 20V Input
PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET
100pF MARGIN CONTROL 13.3k
ON/OFF CIN
LTM4603
COUT
392k 5% MARGIN
PGND
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1
U
U
12VIN, 1.2VOUT 12VIN, 1.5VOUT 12VIN, 1.8VOUT 12VIN, 2.5VOUT 12VIN, 3.3VOUT 12VIN, 5VOUT 4 3 2 5 OUTPUT CURRENT (A) 6 7
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LTM4603/LTM4603-1 ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
INTVCC PLLIN TRACK/SS RUN COMP MPGM TOP VIEW
INTVCC, DRVCC, VOUT_LCL, VOUT (VOUT 3.3V with Remote Sense Amp) ............................ -0.3V to 6V PLLIN, TRACK/SS, MPGM, MARG0, MARG1, PGOOD, fSET .............................. -0.3V to INTVCC + 0.3V RUN ............................................................. -0.3V to 5V VFB, COMP ................................................ -0.3V to 2.7V VIN ............................................................. -0.3V to 20V VOSNS+, VOSNS- .................................. 0V to INTVCC - 1V Operating Temperature Range (Note 2) ... -40C to 85C Junction Temperature ........................................... 125C Storage Temperature Range................... -55C to 125C
VIN
PGND
VOUT
fSET MARG0 MARG1 DRVCC VFB PGOOD SGND VOSNS+/NC2* DIFFVOUT/NC3* VOUT_LCL VOSNS-/NC1*
LGA PACKAGE 118-LEAD (15mm 15mm 2.8mm) TJMAX = 125C, JA = 15C/W, JC = 6C/W, JA DERIVED FROM 95mm x 76mm PCB WITH 4 LAYERS, WEIGHT = 1.7g *LTM4603-1 Only
ORDER PART NUMBER LTM4603EV#PBF LTM4603IV#PBF LTM4603EV-1#PBF LTM4603IV-1#PBF
LGA PART MARKING* LTM4603V LTM4603V LTM4603V-1 LTM4603V-1
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL VIN(DC) VOUT(DC) PARAMETER Input DC Voltage Output Voltage
The denotes the specifications which apply over the -40C to 85C temperature range, otherwise specifications are at TA = 25C, VIN = 12V. Per typical application (front page) configuration.
CONDITIONS
MIN 4.5
TYP
MAX 20
UNITS V
CIN = 10F x2, COUT = 2x, 100F/X5R/ Ceramic VIN = 5V, VOUT = 1.5V, IOUT = 0A VIN = 12V, VOUT = 1.5V, IOUT = 0A IOUT = 0A IOUT = 0A. VOUT = 1.5V VIN = 5V VIN = 12V VIN = 12V, VOUT = 1.5V, No Switching VIN = 12V, VOUT = 1.5V, Switching Continuous VIN = 5V, VOUT = 1.5V, No Switching VIN = 5V, VOUT = 1.5V, Switching Continuous Shutdown, RUN = 0, VIN = 12V

1.478 1.478
1.5 1.5 3.2 0.6 0.7 3.8 25 2.5 43 22
1.522 1.522 4
Input Specifications VIN(UVLO) IINRUSH(VIN) Undervoltage Lockout Threshold Input Inrush Current at Startup V A A mA mA mA mA A
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IQ(VIN,NOLOAD)
Input Supply Bias Current
2
U
V V
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LTM4603/LTM4603-1 ELECTRICAL CHARACTERISTICS
SYMBOL IS(VIN) PARAMETER Input Supply Current
The denotes the specifications which apply over the -40C to 85C temperature range, otherwise specifications are at TA = 25C, VIN = 12V. Per typical application (front page) configuration.
CONDITIONS VIN = 12V, VOUT = 1.5V, IOUT = 6A VIN = 12V, VOUT = 3.3V, IOUT = 6A VIN = 5V, VOUT = 1.5V, IOUT = 6A No Load 4.7 0 MIN TYP 0.85 1.78 2.034 5 5.3 6 MAX UNITS A A A V A
INTVCC Output Specifications IOUTDC
VIN = 12V, RUN > 2V
Output Continuous Current Range VIN = 12V, VOUT = 1.5V (See Output Current Derating Curves for Different VIN, VOUT and TA) VOUT = 1.5V, IOUT = 0A, VIN = 4.5V to 20V VOUT = 1.5V, IOUT = 0A to 6A VIN = 12V, with Remote Sense Amp VIN = 12V, LTM4603-1 IOUT = 0A, COUT = 2x, 100F/X5R/Ceramic VIN = 12V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V IOUT = 3A, VIN = 12V, VOUT = 1.5V COUT = 2x, 100F/X5R/Ceramic, VOUT = 1.5V, IOUT = 0A VIN = 12V VIN = 5V COUT = 2x, 100F/X5R/Ceramic, VOUT = 1.5V, IOUT = 1A Resisitive Load VIN = 12V VIN = 5V Load: 0% to 50% to 0% of Full Load, COUT = 2 x 22F/Ceramic, 470F, 4V Sanyo POSCAP VIN = 12V VIN = 5V
VOUT(NOM) - VOUT(LINE) Line Regulation Accuracy VOUT(NOM) VOUT(NOM) - VOUT(LOAD) Load Regulation Accuracy VOUT(NOM) VOUT(AC) Output Ripple Voltage
0.3
%

0.25 0.5 10 10 1000
% % mVP-P mVP-P kHz
fS VOUT(START)
Output Ripple Voltage Frequency Turn-On Overshoot, TRACK/SS = 10nF
20 20
mV mV
tSTART
Turn-On Time, TRACK/SS = Open
0.5 0.7
ms ms
VOUTLS
Peak Deviation for Dynamic Load
35 35 25 8 8 0 0 1 3 2 INTVCC - 1 INTVCC 1.25
mV mV s A A V V mV V/V MHz V/s k dB
tSETTLE IOUTPK
Settling Time for Dynamic Load Step Load: 0% to 50% to 10% of Full Load VIN = 12V Output Current Limit COUT = 2x, 100F/X5R/Ceramic VIN = 12V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V
Remote Sense Amp (LTM4603 Only, Not Supported in the LTM4603-1) (Note 3) VOSNS+, VOSNS- CM Range DIFFVOUT Range VOS AV GBP SR RIN CMRR Common Mode Input Voltage Range VIN = 12V, RUN > 2V Output Voltage Range Input Offset Voltage Magnitude Differential Gain Gain Bandwidth Product Slew Rate Input Resistance Common Mode Rejection Ratio VOSNS+ to GND VIN = 12V, DIFF OUT Load = 100k
20 100
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LTM4603/LTM4603-1
The denotes the specifications which apply over the -40C to 85C temperature range, otherwise specifications are at TA = 25C, VIN = 12V. Per typical application (front page) configuration.
SYMBOL Control Stage VFB VRUN ISS/TRACK tON(MIN) tOFF(MIN) RPLLIN IDRVCC RFBHI VMPGM VMARG0, VMARG1 PGOOD Output VFBH VFBL VFB(HYS) VPGL PGOOD Upper Threshold PGOOD Lower Threshold PGOOD Hysteresis PGOOD Low Voltage VFB Rising VFB Falling VFB Returning IPGOOD = 5mA 7 -7 10 -10 1.5 0.15 13 -13 3 0.4 % % % V Error Amplifier Input Voltage Accuracy RUN Pin On/Off Threshold Soft-Start Charging Current Minimum On Time Minimum Off Time PLLIN Input Resistance Current into DRVCC Pin Resistor Between VOUT and VFB Margin Reference Voltage MARG0, MARG1 Voltage Thresholds VOUT = 1.5V, IOUT = 1A, Frequency = 1MHz, DRVCC = 5V 60.098 VSS/TRACK = 0V (Note 4) (Note 4) IOUT = 0A, VOUT = 1.5V
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN 0.594 1 -1
TYP 0.6 1.5 -1.5 50 250 50 18 60.4 1.18 1.4
MAX 0.606 1.9 -2 100 400 25 60.702
UNITS V V A ns ns k mA k V V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The LTM4603E/LTM4603-1 are guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4603E/LTM4603-1 are guaranteed and tested over the -40C to 85C temperature range. Note 3: Remote sense amplifier recommended for 3.3V output. Note 4: 100% tested at wafer level only.
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LTM4603/LTM4603-1 TYPICAL PERFOR A CE CHARACTERISTICS (See Figure 18 for all curves)
Efficiency vs Load Current with 5VIN
1.00 0.95 0.90 EFFICIENCY (%) 0.85 EFFICIENCY (%) 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0 1 5VIN, 0.6VOUT 5VIN, 1.2VOUT 5VIN, 1.5VOUT 5VIN, 1.8VOUT 5VIN, 2.5VOUT 5VIN, 3.3VOUT 4 3 2 5 OUTPUT CURRENT (A) 6 7
4603 G01
EFFICIENCY (%)
1.2V Transient Response
LOAD STEP 1A/DIV
VOUT 50mV/DIV
25s/DIV 1.2V AT 3A/s LOAD STEP COUT: 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP
2.5V Transient Response
LOAD STEP 1A/DIV
VOUT 50mV/DIV
25s/DIV 2.5V AT 3A/s LOAD STEP COUT: 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP
UW
Efficiency vs Load Current with 12VIN
1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0 1 12VIN, 1.2VOUT 12VIN, 1.5VOUT 12VIN, 1.8VOUT 12VIN, 2.5VOUT 12VIN, 3.3VOUT 12VIN, 5VOUT 4 3 2 5 OUTPUT CURRENT (A) 6 7
4603 G02
Efficiency vs Load Current with 20VIN
0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0 1 20VIN, 1.5VOUT 20VIN, 1.8VOUT 20VIN, 2.5VOUT 20VIN, 3.3VOUT 20VIN, 5VOUT 4 3 2 5 OUTPUT CURRENT (A) 6 7
4603 G03
1.5V Transient Response
1.8V Transient Response
LOAD STEP 1A/DIV
LOAD STEP 1A/DIV
VOUT 50mV/DIV
VOUT 50mV/DIV
4603 G04
25s/DIV 1.5V AT 3A/s LOAD STEP COUT: 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP
4603 G05
25s/DIV 1.8V AT 3A/s LOAD STEP COUT: 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP
4603 G06
3.3V Transient Response
LOAD STEP 1A/DIV
VOUT 50mV/DIV
4603 G07
25s/DIV 3.3V AT 3A/s LOAD STEP COUT: 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP
4603 G08
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LTM4603/LTM4603-1 TYPICAL PERFOR A CE CHARACTERISTICS (See Figure 18 for all curves)
Start-Up, IOUT = 0A Start-Up, IOUT = 6A (Resistive Load) Short-Circuit Protection, IOUT = 0A
VOUT 0.5V/DIV
IIN 0.5A/DIV 1ms/DIV VIN = 12V VOUT = 1.5V COUT = 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP SOFT-START = 3.9nF
4603 G09
Short-Circuit Protection, IOUT = 6A
5.5 5.0 VOUT 0.5V/DIV 4.5 OUTPUT VOLTAGE (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0
IIN 2A/DIV 100s/DIV VIN = 12V VOUT = 1.5V COUT = 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP SOFT-START = 3.9nF
4603 G12
6
UW
VOUT 0.5V/DIV
VOUT 0.5V/DIV
IIN 0.5A/DIV
IIN 2A/DIV 1ms/DIV VIN = 12V VOUT = 1.5V COUT = 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP SOFT-START = 3.9nF
4603 G10
100s/DIV VIN = 12V VOUT = 1.5V COUT = 1x 22F, 6.3V CERAMIC 1x 330F, 4V SANYO POSCAP SOFT-START = 3.9nF
4603 G11
VIN to VOUT Step-Down Ratio
3.3V OUTPUT WITH 82.5k FROM VOUT TO fSET 5V OUTPUT WITH 150k RESISTOR ADDED FROM fSET TO GND 5V OUTPUT WITH NO RESISTOR ADDED FROM fSET TO GND 2.5V OUTPUT 1.8V OUTPUT 1.5V OUTPUT 1.2V OUTPUT 0 2 4 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V)
4603 G13
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LTM4603/LTM4603-1 PI FU CTIO S
VIN (Bank 1): Power Input Pins. Apply input voltage between these pins and PGND pins. Recommend placing input decoupling capacitance directly between VIN pins and PGND pins. VOUT (Bank 3): Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing output decoupling capacitance directly between these pins and PGND pins. Review the figure below. PGND (Bank 2): Power ground pins for both input and output returns. VOSNS- (Pin M12): (-) Input to the Remote Sense Amplifier. This pin connects to the ground remote sense point. The remote sense amplifier is used for VOUT 3.3V. NC1 (Pin M12): No Connect on the LTM4603-1. VOSNS+ (Pin J12): (+) Input to the Remote Sense Amplifier. This pin connects to the output remote sense point. The remote sense amplifier is used for VOUT 3.3V. NC2 (Pin J12): No Connect on the LTM4603-1. DIFFVOUT (Pin K12): Output of the Remote Sense Amplifier. This pin connects to the VOUT_LCL pin. NC3 (Pin K12): No Connect on the LTM4603-1. DRVCC (Pin E12): This pin normally connects to INTVCC for powering the internal MOSFET drivers. This pin can be biased up to 6V from an external supply with about 50mA capability, or an external circuit shown in Figure 16. This improves efficiency at the higher input voltages by reducing power dissipation in the modules.
A VIN B BANK 1 C D E PGND F BANK 2 G H J VOUT K BANK 3 L M 1 2 3 4 5 6 7 8 9 10 11 12
INTVCC PLLIN TRACK/SS RUN COMP MPGM fSET MARG0 MARG1 DRVCC VFB PGOOD SGND VOSNS+ (NC2, LTM4603-1) DIFFVOUT (NC3, LTM4603-1) VOUT_LCL VOSNS- (NC1, LTM4603-1)
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(See Package Description for Pin Assignment)
INTVCC (Pin A7): This pin is for additional decoupling of the 5V internal regulator. PLLIN (Pin A8): External Clock Synchronization Input to the Phase Detector. This pin is internally terminated to SGND with a 50k resistor. Apply a clock above 2V and below INTVCC. See Applications Information. TRACK/SS (Pin A9): Output Voltage Tracking and SoftStart Pin. When the module is configured as a master output, then a soft-start capacitor is placed on this pin to ground to control the master ramp rate. A soft-start capacitor can be used for soft-start turn on as a stand alone regulator. Slave operation is performed by putting a resistor divider from the master output to the ground, and connecting the center point of the divider to this pin. See Applications Information. MPGM (Pin A12): Programmable Margining Input. A resistor from this pin to ground sets a current that is equal to 1.18V/R. This current multiplied by 10k will equal a value in millivolts that is a percentage of the 0.6V reference voltage. See Applications Information. To parallel LTM4603s, each requires an individual MPGM resistor. Do not tie MPGM pins together. fSET (Pin B12): Frequency Set Internally to 1MHz. An external resistor can be placed from this pin to ground to increase frequency. This pin can be decoupled with a 1000pF capacitor. See Applications Information for frequency adjustment. VFB (Pin F12): The Negative Input of the Error Amplifier. Internally, this pin is connected to VOUT_LCL with a 60.4k precision resistor. Different output voltages can be
TOP VIEW
7
LTM4603/LTM4603-1 PI FU CTIO S
programmed with an additional resistor between VFB and SGND pins. See Applications Information. MARG0 (Pin C12): This pin is the LSB logic input for the margining function. Together with the MARG1 pin will determine if margin high, margin low or no margin state is applied. The pin has an internal pull-down resistor of 50k. See Applications Information. MARG1 (Pin D12): This pin is the MSB logic input for the margining function. Together with the MARG0 pin will determine if margin high, margin low or no margin state is applied. The pin has an internal pull-down resistor of 50k. See Applications Information. SGND (Pin H12): Signal Ground. This pin connects to PGND at output capacitor point. COMP (Pin A11): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage
SI PLIFIED BLOCK DIAGRA
VOUT_LCL >2V = ON <0.9V = OFF MAX = 5V
RUN 5.1V ZENER 60.4k INTERNAL COMP SGND POWER CONTROL Q1 1.5F
PGOOD COMP
MARG1 MARG0 VFB RFB 40.2k fSET 33.2k INTVCC 10k 10k 10k 4.7F DIFFVOUT VOSNS- VOSNS+ 50k 50k Q2 COUT PGND 22F
MPGM TRACK/SS CSS PLLIN 50k INTVCC DRVCC
Figure 1. Simplified LTM4603/LTM4603-1 Block Diagram
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+ -
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(See Package Description for Pin Assignment)
ranges from 0V to 2.4V with 0.7V corresponding to zero sense voltage (zero current). PGOOD (Pin G12): Output Voltage Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is not within 10% of the regulation point, after a 25s power bad mask timer expires. RUN (Pin A10): Run Control Pin. A voltage above 1.9V will turn on the module, and when below 1.9V, will turn off the module. A programmable UVLO function can be accomplished with a resistor from VIN to this pin that has a 5.1V zener to ground. Maximum pin voltage is 5V. VOUT_LCL (Pin L12): VOUT connects directly to this pin to bypass the remote sense amplifier, or DIFFVOUT connects to this pin when remote sense amplifier is used. VOUT_LCL can be connected to VOUT on the LTM4603-1. VOUT is internally connected to VOUT_LCL through 50 in the LTM4603-1.
1M VOUT
+
CIN
VIN 4.5V TO 28V
VOUT 2.5V 6A
+
10k
4603 F01
LTM4603/LTM4603-1 DECOUPLI G REQUIRE E TS
SYMBOL CIN COUT PARAMETER External Input Capacitor Requirement (VIN = 4.5V to 20V, VOUT = 1.5V) External Output Capacitor Requirement (VIN = 4.5V to 20V, VOUT = 1.5V)
OPERATIO
Power Module Description The LTM4603 is a standalone nonisolated switching mode DC/DC power supply. It can deliver up to 6A of DC output current with few external input and output capacitors. This module provides precisely regulated output voltage programmable via one external resistor from 0.6VDC to 5.0VDC over a 4.5V to 20V wide input voltage. The typical application schematic is shown in Figure 18. The LTM4603 has an integrated constant on-time current mode regulator, ultralow RDS(ON) FETs with fast switching speed and integrated Schottky diodes. The typical switching frequency is 1MHz at full load. With current mode control and internal feedback loop compensation, the LTM4603 module has sufficient stability margins and good transient performance under a wide range of operating conditions and with a wide range of output capacitors, even all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit. Besides, foldback current limiting is provided in an overcurrent condition while VFB drops. Internal overvoltage and undervoltage comparators pull the open-drain PGOOD output low if the output feedback voltage exits a 10% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET Q1 is turned off
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TA = 25C, VIN = 12V. Use Figure 1 configuration.
MIN 20 100 200 TYP MAX UNITS F F
CONDITIONS IOUT = 6A IOUT = 6A
and bottom FET Q2 is turned on and held on until the overvoltage condition clears. Pulling the RUN pin below 1V forces the controller into its shutdown state, turning off both Q1 and Q2. At low load current, the module works in continuous current mode by default to achieve minimum output voltage ripple. When DRVCC pin is connected to INTVCC an integrated 5V linear regulator powers the internal gate drivers. If a 5V external bias supply is applied on the DRVCC pin, then an efficiency improvement will occur due to the reduced power loss in the internal linear regulator. This is especially true at the higher input voltage range. The LTM4603 has a very accurate differential remote sense amplifier with very low offset. This provides for very accurate remote sense voltage measurement. The MPGM pin, MARG0 pin and MARG1 pin are used to support voltage margining, where the percentage of margin is programmed by the MPGM pin, and the MARG0 and MARG1 select margining. The PLLIN pin provides frequency synchronization of the device to an external clock. The TRACK/SS pin is used for power supply tracking and soft-start programming.
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
The typical LTM4603 application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 2 for specific external capacitor requirements for a particular application. VIN to VOUT Step-Down Ratios There are restrictions in the maximum VIN and VOUT step down ratio that can be achieved for a given input voltage. These constraints are shown in the Typical Performance Characteristics curves labeled VIN to VOUT Step-Down Ratio. Note that additional thermal derating may apply. See the Thermal Considerations and Output Current Derating section of this data sheet. Output Voltage Programming and Margining The PWM controller has an internal 0.6V reference voltage. As shown in the Block Diagram, a 1M and a 60.4k 0.5% internal feedback resistor connects VOUT and FB pins together. The VOUT_LCL pin is connected between the 1M and the 60.4k resistor. The 1M resistor is used to protect against an output overvoltage condition if the VOUT_LCL pin is not connected to the output, or if the remote sense amplifier output is not connected to VOUT_LCL. The output voltage will default to 0.6V. Adding a resistor RSET from the FB pin to SGND pin programs the output voltage: VOUT = 0.6 V 60.4k + RSET RSET
Table 1. Standard 1% Resistor Values
RSET (k) VOUT (V) Open 0.6 60.4 1.2 40.2 1.5 30.1 1.8 25.5 2 19.1 2.5 13.3 3.3 8.25 5
The MPGM pin programs a current that when multiplied by an internal 10k resistor sets up the 0.6V reference offset for margining. A 1.18V reference divided by the RPGM resistor on the MPGM pin programs the current. Calculate VOUT(MARGIN): VOUT(MARGIN) = %VOUT * VOUT 100
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where %VOUT is the percentage of VOUT you want to margin, and VOUT(MARGIN) is the margin quantity in volts: RPGM = VOUT 1.18 V * * 10k 0.6 V VOUT(MARGIN) where RPGM is the resistor value to place on the MPGM pin to ground. The output margining will be margining of the value. This is controlled by the MARG0 and MARG1 pins. See the truth table below:
MARG0 LOW LOW HIGH HIGH MARG1 LOW HIGH LOW HIGH MODE NO MARGIN MARGIN UP MARGIN DOWN NO MARGIN
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Input Capacitors LTM4603 module should be connected to a low AC impedance DC source. Input capacitors are required to be placed adjacent to the module. In Figure 18, the 10F ceramic input capacitors are selected for their ability to handle the large RMS current into the converter. An input bulk capacitor of 100F is optional. This 100F capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. For a buck converter, the switching duty-cycle can be estimated as: D= VOUT VIN
Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IOUT(MAX ) % * D * ( 1- D )
In the above equation, % is the estimated efficiency of the power module. CIN can be a switcher-rated electrolytic aluminum capacitor, OS-CON capacitor or high volume ceramic capacitor. Note the capacitor ripple current ratings are often based on temperature and hours of life. This makes it advisable to properly derate the input capacitor,
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
or choose a capacitor rated at a higher temperature than required. Always contact the capacitor manufacturer for derating requirements. In Figure 18, the 10F ceramic capacitors are together used as a high frequency input decoupling capacitor. In a typical 6A output application, two very low ESR, X5R or X7R, 10F ceramic capacitors are recommended. These decoupling capacitors should be placed directly adjacent to the module input pins in the PCB layout to minimize the trace inductance and high frequency AC noise. Each 10F ceramic is typically good for 2A to 3A of RMS ripple current. Refer to your ceramics capacitor catalog for the RMS current ratings. Multiphase operation with multiple LTM4603 devices in parallel will lower the effective input RMS ripple current due to the interleaving operation of the regulators. Application Note 77 provides a detailed explanation. Refer to Figure 2 for the input capacitor ripple current requirement as a function of the number of phases. The figure provides a ratio of RMS ripple current to DC load current as a function of duty cycle and the number of paralleled phases. Pick the corresponding duty cycle and the number of phases to arrive at the correct ripple current value. For example, the 2-phase parallel LTM4603 design provides 10A at 2.5V output from a 12V input. The duty cycle is DC = 2.5V/12V = 0.21. The 2-phase curve has a ratio of ~0.25 for a duty cycle of 0.21. This 0.25 ratio of RMS ripple current to a DC load current of 10A equals ~2.5A of input RMS ripple current for the external input capacitors.
0.6 0.5 0.4 0.3 0.2 0.1 0 1 1-PHASE 2-PHASE 3-PHASE 4-PHASE 6-PHASE
RMS INPUT RIPPLE CURRENT DC LOAD CURRENT
IL (A)
0.1
0.2
0.3 0.4 0.5 0.6 0.7 DUTY FACTOR (VOUT/VIN)
0.8
0.9
4603 F02
Figure 2. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Modules (Phases)
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Output Capacitors The LTM4603 is designed for low output voltage ripple. The bulk output capacitors defined as COUT are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, a low ESR polymer capacitor or a ceramic capacitor. The typical capacitance is 200F if all ceramic output capacitors are used. Additional output filtering may be required by the system designer, if further reduction of output ripple or dynamic transient spike is required. Table 2 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 2.5A/s transient. The table optimizes total equivalent ESR and total bulk capacitance to maximize transient performance. Multiphase operation with multiple LTM4603 devices in parallel will lower the effective output ripple current due to the interleaving operation of the regulators. For example, each LTM4603's inductor current of a 12V to 2.5V multiphase design can be read from the "Inductor Ripple versus Duty Cycle" (Figure 3). The large ripple current at low duty cycle and high output voltage can be reduced by adding an external resistor from fSET to ground which increases the frequency. If we choose the duty cycle of DC = 2.5V/12V = 0.21, the inductor ripple current for 2.5V output at 21% duty cycle is ~2.5A in Figure 3.
5 2.5V OUTPUT 4 5V OUTPUT 1.8V OUTPUT 1.5V OUTPUT 3 1.2V OUTPUT 3.3V OUTPUT WITH 82.5k ADDED FROM VOUT TO fSET 5V OUTPUT WITH 150k ADDED FROM fSET TO GND 2 0 0 20 40 60 DUTY CYCLE (VOUT/VIN) 80
4603 F03
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Figure 3. Inductor Ripple Current vs Duty Cycle
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
1.00 0.95 0.90 0.85 0.80 PEAK-TO-PEAK OUTPUT RIPPLE CURRENT DIr 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 DUTY CYCLE (VO/VIN)
4603 F04
RATIO =
Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI
Figure 4 provides a ratio of peak-to-peak output ripple current to the inductor current as a function of duty cycle and the number of paralleled phases. Pick the corresponding duty cycle and the number of phases to arrive at the correct output ripple current ratio value. If a 2-phase operation is chosen at a duty cycle of 21%, then 0.6 is the ratio. This 0.6 ratio of output ripple current to inductor ripple of 2.5A equals 1.5A of effective output ripple current. Refer to Application Note 77 for a detailed explanation of output ripple current reduction as a function of paralleled phases. The output voltage ripple has two components that are related to the amount of bulk capacitance and effective series resistance (ESR) of the output bulk capacitance. Therefore, the output voltage ripple can be calulated with the known effective output ripple current. The equation: VOUT(P-P) (IL/(8 * f * m * COUT) + ESR * IL), where f is frequency and m is the number of parallel phases. This calclation process can be easily fulfilled using our Excel tool (refer to??).
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1-PHASE 2-PHASE 3-PHASE 4-PHASE 6-PHASE
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Fault Conditions: Current Limit and Overcurrent Foldback The LTM4603 has a current mode controller, which inherently limits the cycle-by-cycle inductor current not only in steady-state operation, but also in transient. To further limit current in the event of an overload condition, the LTM4603 provides foldback current limiting. If the output voltage falls by more than 50%, then the maximum output current is progressively lowered to about one sixth of its full current limit value. Soft-Start and Tracking The TRACK/SS pin provides a means to either soft-start the regulator or track it to a different power supply. A capacitor on this pin will program the ramp rate of the output voltage. A 1.4A current source will charge up the external soft-start capacitor to 80% of the 0.6V internal voltage reference minus any margin delta. This will control
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
the ramp of the internal reference and the output voltage. The total soft-start time can be calculated as: t SOFTSTART = 0.8 V * 0.6 V - VOUT(MARGIN) *
(
)
When the RUN pin falls below 1.5V, then the SS pin is reset to allow for proper soft-start control when the regulator is enabled again. Current foldback and force continuous mode are disabled during the soft-start process. The soft-start function can also be used to control the output ramp up time, so that another regulator can be easily tracked to it. Output Voltage Tracking Output voltage tracking can be programmed externally using the TRACK/SS pin. The output can be tracked up and down with another regulator. The master regulator's output is divided down with an external resistor divider that is the same as the slave regulator's feedback divider. Figure 5 shows an example of coincident tracking. Ratiometric modes of tracking can be achieved by selecting different resistor values to change the output tracking ratio. The master output must be greater than the slave output for the tracking to work. Figure 6 shows the coincident output tracking characteristics.
MASTER OUTPUT TRACK CONTROL R2 60.4k R1 40.2k SLAVE OUTPUT COUT
VIN 100k
VIN PGOOD MPGM RUN COMP INTVCC DRVCC
PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET
60.4k FROM VOUT TO VFB
CIN
LTM4603
SGND
PGND
RSET 40.2k
4603 F05
Figure 5
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Run Enable The RUN pin is used to enable the power module. The pin has an internal 5.1V zener to ground. The pin can be driven with a logic input not to exceed 5V. The RUN pin can also be used as an undervoltage lock out (UVLO) function by connecting a resistor divider from the input supply to the RUN pin: VUVLO = R1+ R2 * 1.5V R2 CSS 1.5A Power Good The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin monitors a 10% window around the regulation point and tracks with margining. COMP Pin This pin is the external compensation pin. The module has already been internally compensated for most output voltages. Table 2 is provided for most application requirements. A spice model will be provided for other control loop optimization. PLLIN The power module has a phase-locked loop comprised of an internal voltage controlled oscillator and a phase detector. This allows the internal top MOSFET turn-on to be locked
MASTER OUTPUT SLAVE OUTPUT OUTPUT VOLTAGE TIME
4603 F06
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Figure 6
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
to the rising edge of the external clock. The frequency range is 30% around the operating frequency of 1MHz. A pulse detection circuit is used to detect a clock on the PLLIN pin to turn on the phase lock loop. The pulse width of the clock has to be at least 400ns and 2V in amplitude. During the start-up of the regulator, the phase-lock loop function is disabled. INTVCC and DRVCC Connection An internal low dropout regulator produces an internal 5V supply that powers the control circuitry and DRVCC for driving the internal power MOSFETs. Therefore, if the system does not have a 5V power rail, the LTM4603 can be directly powered by Vin. The gate driver current through the LDO is about 20mA. The internal LDO power dissipation can be calculated as: PLDO_LOSS = 20mA * (VIN - 5V) The LTM4603 also provides the external gate driver voltage pin DRVCC. If there is a 5V rail in the system, it is recommended to connect DRVCC pin to the external 5V rail. This is especially true for higher input voltages. Do not apply more than 6V to the DRVCC pin. A 5V output can be used to power the DRVCC pin with an external circuit as shown in Figure 16. Parallel Operation of the Module The LTM4603 device is an inherently current mode controlled device. Parallel modules will have very good current
3.5 3.0 20V LOSS POWER LOSS (W) 12V LOSS POWER LOSS (W) 2.5 2.0 1.5 5V LOSS 1.0 0.5 0 0 1 4 3 5 2 OUTPUT CURRENT (A) 6 7
4603 F07
3.5 MAXIMUM LOAD CURRENT (A) 3.0 20V LOSS 2.5 2.0 12V LOSS 1.5 1.0 0.5 0 0 1 4 3 5 2 OUTPUT CURRENT (A) 6 7
4603 F08
Figure 7. 1.5V Power Loss
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sharing. This will balance the thermals on the design. The voltage feedback equation changes with the variable as modules are paralleled: 60.4k + RFB VOUT = 0.6 V RFB is the number of paralleled modules. Thermal Considerations and Output Current Derating The power loss curves in Figures 7 and 8 can be used in coordination with the load current derating curves in Figures 9 to 12, and Figures 13 to 14 for calculating an approximate JA for the module with various heat sinking methods. Thermal models are derived from several temperature measurements at the bench and thermal modeling analysis. Thermal Application Note 103 provides a detailed explanation of the analysis for the thermal models and the derating curves. Tables 3 and 4 provide a summary of the equivalent JA for the noted conditions. These equivalent JA parameters are correlated to the measured values, and are improved with air flow. The case temperature is maintained at 100C or below for the derating curves. This allows for 4W maximum power dissipation in the total module with top and bottom heatsinking, and 2W power dissipation through the top of the module with an approximate JC between 6C/W to 9C/W. This equates to a total of 124C at the junction of the device.
6 5 4 3 2 1 0 75 5VIN, 1.5VOUT, 0LFM 5VIN, 1.5VOUT, 200LFM 5VIN, 1.5VOUT, 400LFM 80 85 90 AMBIENT TEMPERATURE (C) 95
4603 F09
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Figure 8. 3.3V Power Loss
Figure 9. No Heat Sink
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
6 MAXIMUM LOAD CURRENT (A) 5 4 3 2 1 0 75 5VIN, 1.5VOUT, 0LFM 5VIN, 1.5VOUT, 200LFM 5VIN, 1.5VOUT, 400LFM 80 85 90 AMBIENT TEMPERATURE (C) 95
4603 F10
6 5 4 3 2 1 0 70 75 80 85 90 AMBIENT TEMPERATURE (C) 12VIN, 1.5VOUT, 0LFM 12VIN, 1.5VOUT, 200LFM 12VIN, 1.5VOUT, 400LFM 95
4603 F11
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
Figure 10. BGA Heat Sink
6 5 4 3 2 1 0 70 12VIN, 3.3VOUT, 0LFM 12VIN, 3.3VOUT, 200LFM 12VIN, 3.3VOUT, 400LFM 75 80 85 90 AMBIENT TEMPERATURE (C) 95
4603 F13
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
Figure 13. No Heat Sink
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6 5 4 3 2 1 0 70 12VIN, 1.5VOUT, 0LFM 12VIN, 1.5VOUT, 200LFM 12VIN, 1.5VOUT, 400LFM 75 80 85 90 AMBIENT TEMPERATURE (C) 95
4603 F12
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Figure 12. BGA Heat Sink
Figure 11. No Heat Sink
6 5 4 3 2 1 0 70 12VIN, 3.3VOUT, 0LFM 12VIN, 3.3VOUT, 200LFM 12VIN, 3.3VOUT, 400LFM 75 80 85 90 AMBIENT TEMPERATURE (C) 95
4603 F14
Figure 14. BGA Heat Sink
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Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 18)
TYPICAL MEASURED VALUES COUT1 VENDORS TAIYO YUDEN TAIYO YUDEN TDK VOUT (V) 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 5 5 CIN (CERAMIC) 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V 2 x 10F 25V PART NUMBER JMK316BJ226ML-T501 (22F, 6.3V) JMK325BJ476MM-T (47F, 6.3V) C3225X5R0J476M (47F, 6.3V) CIN (BULK) 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V 150F 35V COUT1 (CERAMIC) 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 1 x 22F 6.3V 1 x 47F 6.3V 2 x 47F 6.3V 4 x 47F 6.3V 4 x 47F 6.3V 4 x 47F 6.3V COUT2 (BULK) 330F 4V 330F 2.5V 220F 6.3V NONE 330F 4V 330F 2.5V 220F 6.3V NONE 330F 4V 330F 2.5V 220F 6.3V NONE 330F 4V 330F 2.5V 220F 6.3V NONE 330F 4V 330F 2.5V 220F 6.3V NONE 330F 4V 330F 2.5V 220F 6.3V NONE 330F 4V 330F 4V 220F 6.3V NONE 330F 4V 330F 4V 220F 6.3V NONE 330F 4V 330F 4V 220F 6.3V NONE 330F 4V 330F 4V 220F 6.3V NONE NONE NONE VIN (V) 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 7 7 7 7 12 12 12 12 15 20 COUT2 VENDORS SANYO POSCAP SANYO POSCAP SANYO POSCAP DROOP (mV) 34 22 20 32 34 22 20 29.5 35 25 24 36 35 25 24 32.6 38 29.5 28 43 38 28 27 36.4 38 37.6 39.5 66 38 34.5 35.8 50 42 47 50 75 42 47 50 69 110 110 PEAK TO PEAK (mV) 68 40 40 60 68 40 39 55 70 48 47.5 68 70 48 45 61.9 76 57.5 55 80 76 55 52 70 78 74 78.1 119 78 66.3 68.8 98 86 89 94 141 86 88 94 131 215 217 PART NUMBER 6TPE220MIL (220F, 6.3V) 2R5TPE330M9 (330F, 2.5V) 4TPE330MCL (330F, 4V) RECOVERY TIME (s) 30 26 24 18 30 26 24 18 30 30 26 26 30 30 26 26 37 30 26 26 37 30 26 26 40 34 28 12 40 34 28 18 40 32 28 14 40 32 28 22 20 20 LOAD STEP (A/s) 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 RSET (k) 60.4 60.4 60.4 60.4 60.4 60.4 60.4 60.4 40.2 40.2 40.2 40.2 40.2 40.2 40.2 40.2 30.1 30.1 30.1 30.1 30.1 30.1 30.1 30.1 19.1 19.1 19.1 19.1 19.1 19.1 19.1 19.1 13.3 13.3 13.3 13.3 13.3 13.3 13.3 13.3 8.25 8.25
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
Table 3. 1.5V Output
DERATING CURVE Figures 9, 11 Figures 9, 11 Figures 9, 11 Figures 10, 12 Figures 10, 12 Figures 10, 12 VIN (V) 5, 12 5, 12 5, 12 5, 12, 20 5, 12, 20 5, 12, 20 POWER LOSS CURVE Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 AIR FLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink JA (C/W) 15.2 14 12 13.9 11.3 10.25
Table 4. 3.3V Output
DERATING CURVE Figure 13 Figure 13 Figure 13 Figure 14 Figure 14 Figure 14 VIN (V) 12 12 12 12 12 12 POWER LOSS CURVE Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 AIR FLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink JA (C/W) 15.2 14.6 13.4 13.9 11.1 10.5
Heat Sink Manufacturer
Wakefield Engineering Part No: 20069 Phone: 603-635-2800
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
Safety Considerations The LTM4603 modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. Layout Checklist/Example The high integration of LTM4603 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. * Use large PCB copper areas for high current path, including VIN, PGND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. * Place high frequency ceramic input and output capacitors next to the VIN, PGND and VOUT pins to minimize high frequency noise. * Place a dedicated power ground layer underneath the unit. * To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers.
VIN CIN CIN
GND
COUT VOUT
COUT
Figure 15. Recommended Layout
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* Do not put vias directly on pads. * If vias are placed onto the pads, the the vias must be capped. * Interstitial via placement can also be used if necessary. * Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to PGND underneath the unit. Figure 15 gives a good example of the recommended layout. Frequency Adjustment The LTM4603 is designed to typically operate at 1MHz across most input conditions. The fSET pin is typically left open or decoupled with an optional 1000pF capacitor. The switching frequency has been optimized for maintaining constant output ripple noise over most operating ranges. The 1MHz switching frequency and the 400ns minimum off time can limit operation at higher duty cycles like 5V to 3.3V, and produce excessive inductor ripple currents for lower duty cycle applications like 20V to 5V. The 5V and 3.3V drop out curves are modified by adding an external resistor on the fSET pin to allow for lower input voltage operation, or higher input voltage operation.
SIGNAL GND
4603 F15
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
Example for 5V Output LTM4603 minimum on-time = 100ns; tON = ((4.8 * 10pf)/IfSET) LTM4603 minimum off-time = 400ns; tOFF = t - tON, where t = 1/Frequency Duty Cycle = tON/t or VOUT/VIN Equations for setting frequency: IfSET = (VIN/(3 * RfSET)), for 20V operation, ISET = 201A, tON = ((4.8 * 10pF)/IfSET), tON = 239ns, where the internal RfSET is 33.2k. Frequency = (VOUT/(VIN * tON)) = (5V/(20 * 239ns)) ~ 1MHz. The inductor ripple current begins to get high at the higher input voltages due to a larger voltage across the inductor. This is noted in the "Typical Inductor Ripple Current verses Duty Cycle graph" at ~4.5A at 25% duty cycle. The inductor ripple current can be lowered at the higher input voltages by adding an external resistor from fSET to ground to increase the switching frequency. A 3A ripple current is chosen, and the total peak current is equal to 1/2 of the 3A ripple current plus the output current. The 5V output current is limited to 5A, so total peak current is less than 6.5A. This is below the 7A peak specified value. A 150k resistor is placed from fSET to ground, and the parallel combination of 150k and 33.2k equates to 27.2k. The IfSET calculation with 27.2k and 20V input voltage equals 245A. This equates to a tON of 196ns. This will increase the switching frequency from 1MHz to ~1.28MHz for the 20V to 5V conversion. The minimum on time is above 100ns at 20V input. Since the switching frequency is approximately constant over input and output conditions, then the lower input voltage range is limited to 10V for the 1.28MHz operation due to the 400ns minimum off time. Equation: tON = (VOUT/VIN) * (1/Frequency) equates to a 382ns on time, and a 400ns off time. The "VIN to VOUT Step Ratio Curve" reflects an operating range of 10V to 20V for 1.28MHz operation with a 150k resistor to ground, and an 8V to 16V operation for fSET floating. These modifications are made to provide wider input voltage ranges for the 5V output designs while limiting the inductor ripple current, and maintaining the 400ns minimum off time.
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Example for 3.3V Output LTM4603 minimum on-time = 100ns; tON = ((3.3 * 10pF)/IfSET) LTM4603 minimum off-time = 400ns; tOFF = t - tON, where t = 1/Frequency Duty Cycle (DC) = tON/t or VOUT/VIN Equations for setting frequency: IfSET = (VIN/(3 * RfSET)), for 20V operation, IfSET = 201A, tON = ((3.3 * 10pf)/IfSET), tON = 164ns, where the internal RfSET is 33.2k. Frequency = (VOUT/(VIN * tON)) = (3.3V/(20 * 164ns)) ~ 1MHz. The minimum on-time and minimumoff time are within specification at 164ns and 836ns. The 4.5V minimum input for converting 3.3V output will not meet the minimum off-time specification of 400ns. tON = 733ns, Frequency = 1MHz, tOFF = 267ns. Solution Lower the switching frequency at lower input voltages to allow for higher duty cycles, and meet the 400ns minimum off-time at 4.5V input voltage. The off-time should be about 500ns with 100ns guard band. The duty cycle for (3.3V/4.5) = ~73%. Frequency = (1 - DC)/tOFF, or (1 - 0.73)/500ns = 540kHz. The switching frequency needs to be lowered to 540kHz at 4.5V input. tON = DC/frequency, or 1.35s. The fSET pin voltage compliance is 1/3 of VIN, and the IfSET current equates to 45A with the internal 33.2k. The IfSET current needs to be 24A for 540kHz operation. A resistor can be placed from VOUT to fSET to lower the effective IfSET current out of the fSET pin to 24A. The fSET pin is 4.5V/3 =1.5V and VOUT = 3.3V, therefore 82.5k will source 21A into the fSET node and lower the IfSET current to 24A. This enables the 540kHz operation and the 4.5V to 20V input operation for down converting to 3.3V output. The frequency will scale from 540kHz to 1.2MHz over this input range. This provides for an effective output current of 5A over the input range.
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
VOUT VIN 10V TO 20V TRACK/SS CONTROL R2 100k R4 100k VIN PGOOD MPGM RUN COMP INTVCC DRVCC PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL NC3 NC1 NC2 fSET RfSET 150k MARGIN CONTROL IMPROVE EFFICIENCY FOR 12V INPUT DUAL CMSSH-3C3 SOT-323 RSET 8.25k REVIEW TEMPERATURE DERATING CURVE C6 100pF
C2 10F 25V
5% MARGIN R1 392k 1% C1 10F 25V
SGND
Figure 16. 5V at 5A Design Without Differential Amplifier
VOUT VIN 4.5V TO 20V TRACK/SS CONTROL R2 100k R4 100k VIN PGOOD MPGM RUN COMP INTVCC DRVCC PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET RfSET 82.5k RSET 13.3k REVIEW TEMPERATURE DERATING CURVE C6 100pF VOUT 3.3V 5A C3 100F 6.3V SANYO POSCAP
PGOOD
C2 10F 25V
R1 392k C1 10F 25V 5% MARGIN SGND PGND
Figure 17. 3.3V at 5A Design
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VOUT 5V C3 5A 100F REFER TO 6.3V SANYO POSCAP TABLE 2 LTM4603-1 INTVCC PGND
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LTM4603
MARGIN CONTROL
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LTM4603/LTM4603-1 APPLICATIO S I FOR ATIO
VOUT VIN 4.5V TO 20V R2 100k R4 100k
VIN PGOOD
PGOOD
CIN BULK OPT. TABLE 2
+
CIN 10F 25V x2 CER
MPGM RUN ON/OFF COMP INTVCC DRVCC R1 392k SGND
5% MARGIN
Figure 18. Typical 4.5V-20VIN, 1.5V at 6A Design
4.5V TO 16V R1 100k
C10 10F 25V
C12 0.1F LTC6908-1 1 R11 118k 2 3 V+ GND SET OUT1 OUT2 MOD 4 5 6 R5 392k
2-PHASE OSCILLATOR 4.5V TO 16V R3 100k
+
C11* 100F 25V
*C11 OPTIONAL TO REDUCE LC RINGING. NOT NEEDED FOR LOW INDUCTANCE PLANE CONNECTIONS
Figure 19. 2-Phase, 2.5V and 1.2V at 6A with Tracking
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CLOCK SYNC C5 0.01F PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET RSET 40.2k
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REVIEW TEMPERATURE DERATING CURVE C3 100pF MARGIN CONTROL COUT1 22F 6.3V
+
COUT2 470F 6.3V
VOUT 1.5V 6A
LTM4603
PGND
REFER TO TABLE 2
CLOCK SYNC 0 PHASE 1.2V R2 100k R9 19.1k VIN PGOOD MPGM RUN COMP INTVCC DRVCC PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET R7 60.4k R10 60.4k
2.5V
C1 10F 25V
1.2V AT 6A C6 100pF MARGIN CONTROL C4 22F 6.3V C5 470F 6.3V
LTM4603
+
SGND
PGND
CLOCK SYNC 180 PHASE 2.5V R4 100k C3 0.01F VIN PGOOD MPGM RUN COMP INTVCC DRVCC PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET R8 19.1k
4603 F19
C2 10F 25V
2.5V AT 6A C6 100pF MARGIN CONTROL C7 22F 6.3V C8 470F 6.3V
LTM4603
+
R6 392k
SGND
PGND
4603f
21
TYPICAL APPLICATIO
LTM4603/LTM4603-1
8V TO 16V C7 0.15F 3.3V AT 5A C12 100pF MARGIN CONTROL ON/OFF LTM4603 REFER TO TABLE 2 C14 10F 25V x2 R9 392k SGND PGND C9 22F 6.3V C10 470F 6.3V PGOOD MPGM RUN COMP INTVCC DRVCC R10 100k R11 100k VIN PGOOD PLLIN TRACK/SS VOUT
TRACK/SS CONTROL 3.3V 8V TO 16V
3.3V R24 19.1k 2.5V AT 6A C18 100pF MARGIN CONTROL C16 22F 6.3V VFB MARG0 MARG1 REFER TO TABLE 2
R6 100k PLLIN TRACK/SS VOUT
R7 100k
VIN PGOOD
PGOOD VFB MARG0 MARG1
+
+
ON/OFF LTM4603
C15 470F 6.3V
+
C11 100F 35V OPT PGND R8 13.3k 5% MARGIN CLOCK SYNC 3 TRACK 2.5V 3.3V R19 30.1k 1.8V AT 6A C8 100pF MARGIN CONTROL REFER TO TABLE 2 C3 22F 6.3V C4 470F 6.3V R15 100k R16 100k R21 60.4k 3.3V 8V TO 16V CLOCK SYNC 4 fSET
MPGM RUN COMP INTVCC DRVCC VOUT_LCL DIFFVOUT VOSNS+ VOSNS-
R27 392k
VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET R18 19.1k
C8 10F 25V x2
SGND
5% MARGIN
R25 60.4k 3.3V R26 40.2k
3.3V
8V TO 16V
R2 100k PLLIN TRACK/SS VOUT
R3 100k
VIN PGOOD
VIN PGOOD PGOOD
PLLIN TRACK/SS VOUT VFB MARG0 MARG1 LTM4603 C14 10F 25V x2 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- SGND PGND fSET
1.5V AT 6A C24 100pF MARGIN CONTROL C16 22F 6.3V MPGM RUN ON/OFF COMP INTVCC DRVCC R14 392k REFER TO TABLE 2
PGOOD LTM4603 VOUT_LCL DIFFVOUT VOSNS+ VOSNS- fSET R12 30.1k
C2 10F 25V x2 PGND
MPGM RUN ON/OFF COMP INTVCC DRVCC R1 392k
VFB MARG0 MARG1
+
+
C15 470F 6.3V
SGND
R13 40.2k 5% MARGIN
5% MARGIN
U
22
4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Tracking
8V TO 16V R17 59k LTC6902 4-PHASE OSCILLATOR R23 60.4k C26 0.1F CLOCK SYNC 1 CLOCK SYNC 2 V+ SET DIV MOD PH GND OUT1 OUT4 OUT2 OUT3
-48V INPUT
INTERMEDIATE BUS
3.3V OR APPROPRIATE
4603f
LGA Package 118-Lead (15mm x 15mm)
(Reference LTM DWG # 05-05-1801 Rev O)
6.9850
5.7150
4.4450
3.1750
1.9050
0.6350 0.0000 0.6350
1.9050
3.1750
4.4450
5.7150
6.9850
2.72 - 2.92 Y
aaa Z 15 BSC X
6.9850 PAD 1 CORNER 4
5.7150
4.4450
3.1750
PACKAGE DESCRIPTIO
1.9050 15 BSC SUBSTRATE
0.6350 0.0000 0.6350 MOLD CAP
1.9050 0.27 - 0.37 2.45 - 2.55 DETAIL B bbb Z Z
3.1750
4.4450
5.7150
6.9850
aaa Z
SUGGESTED SOLDER PAD LAYOUT TOP VIEW
DETAIL A DETAIL B 0.60 - 0.66 M L K J H G F E D C B PADS SEE NOTES 3 A 7 8 9 10 11 12 DETAIL A 0.60 - 0.66 eee M X Y
TOP VIEW
0.12 - 0.28
13.97 BSC
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222, SPP-010 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 118 SYMBOL TOLERANCE 0.10 aaa 0.10 bbb 0.03 eee
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LGA 118 0306 REV O
13.97 BSC
1.27 BSC
C(0.30) PAD 1
1
2
3
4
5
6
BOTTOM VIEW
U LTM4603/LTM4603-1
23
4603f
LTM4603/LTM4603-1 TYPICAL APPLICATION
3.3V at 5A, LTM4603-1 (No Remote Sense Amplifier)
VIN 4.5V TO 20V
TRACK/SS CONTROL R2 100k R4 100k VIN PGOOD MPGM RUN COMP INTVCC DRVCC PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL NC3 NC2 NC1 fSET RfSET 82.5k
PGOOD
LTM4603-1
REVIEW TEMPERATURE DERATING CURVE VOUT 3.3V C6 5A 100pF + C3 100F 6.3V
C2 10F 35V
R1 392k C1 10F 35V 5% MARGIN
RSET 13.3k
SGND
PGND
4603 TA05
MARGIN CONTROL
RELATED PARTS
PART NUMBER LTC2900 LTC2923 LT3825/LT3837 LTM4600 LTM4601 LTM4602 DESCRIPTION Quad Supply Monitor with Adjustable Reset Timer Power Supply Tracking Controller Synchronous Isolated Flyback Controllers 10A DC/DC Module 12A DC/DC Module 6A DC/DC Module COMMENTS Monitors Four Supplies; Adjustable Reset Timer Tracks Both Up and Down; Power Supply Sequencing No Optocoupler Required; 3.3V, 12A Output; Simple Design Basic 10A Power Supply with PLL, Output Tracking and Margining, LTM4603 Pin Compatible Basic 6A Power Supply
4603f
24 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0307 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007

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